MPC940L Datasheet by NXP USA Inc.

View All Related Products | Download PDF Datasheet
MOTOROLA Low Voltage 1 :18 Clock Distribution Chip MPC940L ® MOTOROLA
SEMICONDUCTOR TECHNICAL DATA Order this document
by MPC940L/D
1REV 3
Motorola, Inc. 2001
01/01
The MPC940L is a 1:18 low voltage clock distribution chip with 2.5V or
3.3V LVCMOS output capabilities. The device features the capability to
select either a differential LVPECL or an LVCMOS compatible input. The
18 outputs are 2.5V or 3.3V LVCMOS compatible and feature the drive
strength to drive 50 series or parallel terminated transmission lines.
With output–to–output skews of 150ps, the MPC940L is ideal as a clock
distribution chip for the most demanding of synchronous systems. The
2.5V outputs also make the device ideal for supplying clocks for a high
performance microprocessor based design. For a similar device at a
lower price/performance point the reader is referred to the MPC9109.
LVPECL or LVCMOS Clock Input
2.5V LVCMOS Outputs for Pentium II Microprocessor Support
150ps Maximum Output–to–Output Skew
Maximum Output Frequency of 250MHz
32–Lead LQFP Packaging
Dual or Single Supply Device:
Dual VCC Supply Voltage, 3.3V Core and 2.5V Output
Single 3.3V VCC Supply Voltage for 3.3V Outputs
Single 2.5V VCC Supply Voltage for 2.5V I/O
With a low output impedance (20), in both the HIGH and LOW logic
states, the output buffers of the MPC940L are ideal for driving series
terminated transmission lines. With a 20 output impedance the 940L
has the capability of driving two series terminated lines from each output.
This gives the device an effective fanout of 1:36. If a lower output
impedance is desired please see the MPC942 data sheet.
The differential LVPECL inputs of the MPC940L allow the device to interface directly with a LVPECL fanout buffer like the
MC100EP111 to build very wide clock fanout trees or to couple to a high frequency clock source. The LVCMOS input provides a
more standard interface for applications requiring only a single clock distribution chip at relatively low frequencies. In addition, the
two clock sources can be used to provide for a test clock interface as well as the primary system clock. A logic HIGH on the
LVCMOS_CLK_Sel pin will select the LVCMOS level clock input. All inputs of the MPC940L have internal pullup/pulldown
resistor so they can be left open if unused.
The MPC940L is a single or dual supply device. The device power supply offers a high degree of flexibility. The device can
operate with a 3.3V core and 3.3V output, a 3.3V core and 2.5V outputs as well as a 2.5V core and 2.5V outputs. The 32–lead
LQFP package was chosen to optimize performance, board space and cost of the device. The 32–lead LQFP has a 7x7mm body
size with a conservative 0.8mm pin spacing.
LOW VOLTAGE
1:18 CLOCK
DISTRIBUTION CHIP
FA SUFFIX
32–LEAD LQFP PACKAGE
CASE 873A–02
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
E 3333333: HHHHHHHH IEIIIIEI
MPC940L
MOTOROLA TIMING SOLUTIONS
DL207 — Rev 0
2
Pinout: 32–Lead TQFP (Top View)
FUNCTION TABLE
LVCMOS_CLK_Sel Input
0
1PECL_CLK
LVCMOS_CLK
LOGIC DIAGRAM
LVCMOS_CLK Q0
PECL_CLK 0
1
LVCMOS_CLK_Sel
PECL_CLK
GNDO
Q5
Q4
Q3
VCCO
Q2
Q1
Q0
VCCO
Q12
Q13
Q14
GNDO
Q15
Q16
Q17
Q6
Q7
Q8
VCCI
Q9
Q10
Q11
GND
GNDO
GNDI
VCCI
LVCMOS_CLK
LVCMOS_CLK_Sel
PECL_CLK
PECL_CLK
VCCO
25
26
27
28
29
30
31
32
15
14
13
12
11
10
9
12345678
24 23 22 21 20 19 18 17 16
MPC940L
Q1–Q16
16
Q17
POWER SUPPLY VOLTAGES
Supply Pin Voltage Level
VCCI
VCCO 2.5V or 3.3V ± 5%
2.5V or 3.3V ± 5%
(Internal Pulldown)
PIN CONFIGURATIONS
Pin I/O
PECL_CLK Input
Type Function
LVPECL Reference Clock Input
PECL_CLK
LVCMOS_CLK Input LVCMOS Alternative Reference Clock Input
LVCMOS_CLK_SEL Input LVCMOS Selects Clock Source
Q0–Q17 Output LVCMOS Clock Outputs
VCCO Supply Output Positive Power Supply
VCCI Supply Core Positive Power Supply
GNDO Supply Output Negative Power Supply
GNDI Supply Core Negative Power Supply
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
w
MPC940L
TIMING SOLUTIONS
DL207 — Rev 0 3 MOTOROLA
ABSOLUTE MAXIMUM RATINGS*
Symbol Parameter Min Max Unit
VCC Supply Voltage –0.3 3.6 V
VIInput Voltage –0.3 VDD + 0.3 V
IIN Input Current ±20 mA
TStor Storage Temperature Range –40 125 °C
* Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those
indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is not implied.
DC CHARACTERISTICS (TA = 0° to 70°C, VCCI = 3.3V ±5%; VCCO = 3.3V ±5%)
Symbol Characteristic Min Typ Max Unit Condition
VIH Input HIGH Voltage CMOS_CLK 2.4 VCCI V
VIL Input LOW Voltage CMOS_CLK 0.8 V
VPP Peak–to–Peak Input Voltage PECL_CLK 500 1000 mV
VCMR Common Mode Range PECL_CLK VCC–1.4 VCC–0.6 V
VOH Output HIGH Voltage 2.4 V IOH = –20mA
VOL Output LOW Voltage 0.5 V IOH = 20mA
IIN Input Current ±200 µA
CIN Input Capacitance 4.0 pF
Cpd Power Dissipation Capacitance 10 pF per output
ZOUT Output Impedance 18 23 28
ICC Maximum Quiescent Supply Current 0.5 1.0 mA
AC CHARACTERISTICS (TA = 0° to 70°C, VCCI = 3.3V ±5%; VCCO = 3.3V ±5%)
Symbol Characteristic Min Typ Max Unit Condition
Fmax Maximum Input Frequency 250 MHz
tPLH Propagation Delay PECL_CLK 150MHz
CMOS_CLK 150MHz 2.0
1.8 2.7
2.5 3.4
3.0 ns Note 1.
tPLH Propagation Delay PECL_CLK > 150MHz
CMOS_CLK > 150MHz 2.0
1.8 2.9
2.4 3.7
3.2 ns
tsk(o) Output–to–Output Skew PECL_CLK
CMOS_CLK 150
150 ps Note 1.
tsk(pp) Part–to–Part Skew PECL_CLK < 150MHz
CMOS_CLK < 150MHz 1.4
1.2 ns Notes 1., 2.
tsk(pp) Part–to–Part Skew PECL_CLK > 150MHz
CMOS_CLK > 150MHz 1.7
1.4 ns Notes 1., 2.
tsk(pp) Part–to–Part Skew PECL_CLK
CMOS_CLK 850
750 ps Notes 1., 3.
DC Output Duty Cycle fCLK < 134 MHz
fCLK 250 MHz 45
40 50
50 55
60 %
%Input DC = 50%
Input DC = 50%
tr, tfOutput Rise/Fall Time 0.3 1.1 ns 0.5 – 2.4 V
1. Tested using standard input levels, Production tested @ 150MHz.
2. Across temperature and voltage ranges, Includes output skew.
3. For a specific temperature and voltage, Includes output skew.
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
w
MPC940L
MOTOROLA TIMING SOLUTIONS
DL207 — Rev 0
4
DC CHARACTERISTICS (TA = 0° to 70°C, VCCI = 3.3V ±5%; VCCO = 2.5V ±5%)
Symbol Characteristic Min Typ Max Unit Condition
VIH Input HIGH Voltage CMOS_CLK 2.4 VCCI V
VIL Input LOW Voltage CMOS_CLK 0.8 V
VPP Peak–to–Peak Input Voltage PECL_CLK 500 1000 mV
VCMR Common Mode Range PECL_CLK VCC–1.4 VCC–0.6 V
VOH Output HIGH Voltage 1.8 V IOH = –20mA
VOL Output LOW Voltage 0.5 V IOH = 20mA
IIN Input Current ±200 µA
CIN Input Capacitance 4.0 pF
Cpd Power Dissipation Capacitance 10 pF per output
ZOUT Output Impedance 23
ICC Maximum Quiescent Supply Current 0.5 1.0 mA
AC CHARACTERISTICS (TA = 0° to 70°C, VCCI = 3.3V ±5%; VCCO = 2.5V ±5%)
Symbol Characteristic Min Typ Max Unit Condition
Fmax Maximum Input Frequency 250 MHz
tPLH Propagation Delay PECL_CLK 150MHz
CMOS_CLK 150MHz 2.0
1.7 2.8
2.5 3.5
3.0 ns Note 1.
tPLH Propagation Delay PECL_CLK > 150MHz
CMOS_CLK > 150MHz 2.0
1.8 2.9
2.5 3.8
3.3 ns
tsk(o) Output–to–Output Skew PECL_CLK
CMOS_CLK 150
150 ps Note 1.
tsk(pp) Part–to–Part Skew PECL_CLK < 150MHz
CMOS_CLK < 150MHz 1.5
1.3 ns Notes 1., 2.
tsk(pp) Part–to–Part Skew PECL_CLK > 150MHz
CMOS_CLK > 150MHz 1.8
1.5 ns Notes 1., 2.
tsk(pp) Part–to–Part Skew PECL_CLK
CMOS_CLK 850
750 ps Notes 1., 3.
DC Output Duty Cycle fCLK < 134 MHz
fCLK 250 MHz 45
40 50
50 55
60 %
%Input DC = 50%
Input DC = 50%
tr, tfOutput Rise/Fall Time 0.3 1.2 ns 0.5 – 1.8 V
1. Tested using standard input levels, Production tested @ 150MHz.
2. Across temperature and voltage ranges, Includes output skew.
3. For a specific temperature and voltage, Includes output skew.
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
w
MPC940L
TIMING SOLUTIONS
DL207 — Rev 0 5 MOTOROLA
DC CHARACTERISTICS (TA = 0° to 70°C, VCCI = 2.5V ±5%; VCCO = 2.5V ±5%)
Symbol Characteristic Min Typ Max Unit Condition
VIH Input HIGH Voltage CMOS_CLK 2.0 VCCI V
VIL Input LOW Voltage CMOS_CLK 0.8 V
VPP Peak–to–Peak Input Voltage PECL_CLK 500 1000 mV
VCMR Common Mode Range PECL_CLK VCC–1.0 VCC–0.6 V
VOH Output HIGH Voltage 1.8 V IOH = –12mA
VOL Output LOW Voltage 0.5 V IOH = 12mA
IIN Input Current ±200 µA
CIN Input Capacitance 4.0 pF
Cpd Power Dissipation Capacitance 10 pF per output
ZOUT Output Impedance 18 23 28
ICC Maximum Quiescent Supply Current 0.5 1.0 mA
AC CHARACTERISTICS (TA = 0° to 70°C, VCCI = 2.5V ±5%; VCCO = 2.5V ±5%)
Symbol Characteristic Min Typ Max Unit Condition
Fmax Maximum Input Frequency 200 MHz
tPLH Propagation Delay PECL_CLK 150MHz
CMOS_CLK 150MHz 2.6
2.3 4.0
3.1 5.2
4.0 ns Note 1.
tPLH Propagation Delay PECL_CLK > 150MHz
CMOS_CLK > 150MHz 2.8
2.3 3.8
3.1 5.0
4.0 ns
tsk(o) Output–to–Output Skew PECL_CLK
CMOS_CLK 200
200 ps Note 1.
tsk(pp) Part–to–Part Skew PECL_CLK < 150MHz
CMOS_CLK < 150MHz 2.6
1.7 ns Notes 1., 2.
tsk(pp) Part–to–Part Skew PECL_CLK > 150MHz
CMOS_CLK > 150MHz 2.2
1.7 ns Notes 1., 2.
tsk(pp) Part–to–Part Skew PECL_CLK
CMOS_CLK 1.2
1.0 ns Notes 1., 3.
DC Output Duty Cycle fCLK < 134 MHz
fCLK 250 MHz 45
40 50
50 55
60 %
%Input DC = 50%
Input DC = 50%
tr, tfOutput Rise/Fall Time 0.3 1.2 ns 0.5 – 1.8 V
1. Tested using standard input levels, Production tested @ 150MHz.
2. Across temperature and voltage ranges, Includes output skew.
3. For a specific temperature and voltage, Includes output skew.
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
MPC940L
MOTOROLA TIMING SOLUTIONS
DL207 — Rev 0
6
Figure 1. LVCMOS_CLK MPC940L AC test reference for Vcc = 3.3V and Vcc = 2.5V
Figure 2. PECL_CLK MPC940L AC test reference for Vcc = 3.3V and Vcc = 2.5V
Pulse
Generator
Z = 50
RT = 50
ZO = 50
RT = 50
ZO = 50
MPC940L DUT
VTT VTT
Differential
Pulse Generator
Z = 50
RT = 50
ZO = 50
RT = 50
ZO = 50
MPC940L DUT
VTT VTT
Figure 3. Propagation delay (tPD) test reference Figure 4. LVCMOS Propagation delay (tPD) test reference
Figure 5. Output Duty Cycle (DC) Figure 6. Output–to–output Skew tSK(O)
The pin–to–pin skew is defined as the worst case difference in
propagation delay between any two similar delay path within a
single device
The time from the PLL controlled edge to the non controlled
edge, divided by the time between PLL controlled edges,
expressed as a percentage
VCC
VCC 2
GND
VOH
VCC 2
GND
tSK(O)
VCC
VCC 2
GND
tP
T0
DC = tP/T0 x 100%
VCC
VCC 2
GND
VCC
VCC 2
GND
tPD
LVCMOS_CLK
Q
VCC
VCC 2
GND
tPD
PECL_CLK
Q
PECL_CLK VCMR
VPP
tFtR
VCC=3.3V VCC=2.5V
2.0 1.7V
0.8 0.7V
Figure 7. Output Transition Time Test Reference
tFtR
VCC=3.3V VCC=2.5V
2.4 1.8V
0.55 0.6V
Figure 8. Input Transition Time Test Reference
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
E4 + /‘ @E nn nmn nn “ lfl E J uu uwu uu :34 E DP w x 32mg; mum: 1mm mam:
MPC940L
TIMING SOLUTIONS
DL207 — Rev 0 7 MOTOROLA
OUTLINE DIMENSIONS
FA SUFFIX
QFP PACKAGE
CASE 873A–02
ISSUE A
DETAIL Y
A
S1
VB
1
8
9
17
25
32
AE
AE
P
DETAIL Y
BASE
N
J
DF
METAL
SECTION AE–AE
G
SEATING
PLANE
R
Q
WK
X
0.250 (0.010)
GAUGE PLANE
E
C
H
DETAIL AD
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DATUM PLANE –AB– IS LOCATED AT BOTTOM OF
LEAD AND IS COINCIDENT WITH THE LEAD
WHERE THE LEAD EXITS THE PLASTIC BODY AT
THE BOTTOM OF THE PARTING LINE.
4. DATUMS –T–, –U–, AND –Z– TO BE DETERMINED
AT DATUM PLANE –AB–.
5. DIMENSIONS S AND V TO BE DETERMINED AT
SEATING PLANE –AC–.
6. DIMENSIONS A AND B DO NOT INCLUDE MOLD
PROTRUSION. ALLOWABLE PROTRUSION IS
0.250 (0.010) PER SIDE. DIMENSIONS A AND B
DO INCLUDE MOLD MISMATCH AND ARE
DETERMINED AT DATUM PLANE –AB–.
7. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. DAMBAR PROTRUSION SHALL
NOT CAUSE THE D DIMENSION TO EXCEED
0.520 (0.020).
8. MINIMUM SOLDER PLATE THICKNESS SHALL BE
0.0076 (0.0003).
9. EXACT SHAPE OF EACH CORNER MAY VARY
FROM DEPICTION.
DIM
AMIN MAX MIN MAX
INCHES
7.000 BSC 0.276 BSC
MILLIMETERS
B7.000 BSC 0.276 BSC
C1.400 1.600 0.055 0.063
D0.300 0.450 0.012 0.018
E1.350 1.450 0.053 0.057
F0.300 0.400 0.012 0.016
G0.800 BSC 0.031 BSC
H0.050 0.150 0.002 0.006
J0.090 0.200 0.004 0.008
K0.500 0.700 0.020 0.028
M12 REF 12 REF
N0.090 0.160 0.004 0.006
P0.400 BSC 0.016 BSC
Q1 5 1 5
R0.150 0.250 0.006 0.010
V9.000 BSC 0.354 BSC
V1 4.500 BSC 0.177 BSC
DETAIL AD
A1
B1 V1
4X
S
4X
B1 3.500 BSC 0.138 BSC
A1 3.500 BSC 0.138 BSC
S9.000 BSC 0.354 BSC
S1 4.500 BSC 0.177 BSC
W0.200 REF 0.008 REF
X1.000 REF 0.039 REF
9
–T–
–Z–
–U–
T–U0.20 (0.008) Z
AC
T–U0.20 (0.008) ZAB
0.10 (0.004) AC
–AC–
–AB–
M
8X
–T–, –U–, –Z–
T–U
M
0.20 (0.008) ZAC
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
® MOTOROLA
MPC940L
MOTOROLA TIMING SOLUTIONS
DL207 — Rev 0
8
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or
guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the
application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental
damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application
by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are
not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where
personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application,
Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs,
damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated
with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the
part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
How to reach us:
USA/EUROPE/Locations Not Listed: Motorola Literature Distribution; JAPAN: Motorola Japan Ltd.; SPS, Technical Information Center, 3–20–1,
P.O. Box 5405, Denver, Colorado 80217. 1–303–675–2140 or 1–800–441–2447 Minami–Azabu. Minato–ku, Tokyo 106–8573 Japan. 81–3–3440–3569
Technical Information Center: 1–800–521–6274 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Centre,
2, Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong.
852–26668334
HOME PAGE: http://www.motorola.com/semiconductors/
MPC940L/D
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...

Products related to this Datasheet

IC CLOCK DISTRIBUTON 1:18 32LQFP
Available Quantity: 0
Unit Price: 0
IC CLOCK DISTRIB LV 1:18 32-LQFP
Available Quantity: 0
Unit Price: 0
IC CLOCK DIST CHIP 1:18 32-LQFP
Available Quantity: 0
Unit Price: 0