74AUP1G97GS,132 Datasheet by NXP USA Inc.

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74AUP1G97
Low-power configurable multiple function gate
Rev. 10 — 28 March 2017 Product data sheet
1 General description
The 74AUP1G97 provides configurable multiple functions. The output state is determined
by eight patterns of 3-bit input. The user can choose the logic functions MUX, AND, OR,
NAND, NOR, inverter and buffer. All inputs can be connected to VCC or GND.
This device ensures a very low static and dynamic power consumption across the entire
VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using IOFF. The IOFF
circuitry disables the output, preventing the damaging backflow current through the
device when it is powered down.
The 74AUP1G97 has Schmitt trigger inputs making it capable of transforming slowly
changing input signals into sharply defined, jitter-free output signals.
The inputs switch at different points for positive and negative-going signals. The
difference between the positive voltage VT+ and the negative voltage VT- is defined as the
input hysteresis voltage VH.
2 Features and benefits
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
ESD protection:
HBM JESD22-A114F exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Low static power consumption; ICC = 0.9 μA (maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of VCC
IOFF circuitry provides partial power-down mode operation
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C
74AUP1GQ7
Nexperia 74AUP1G97
Low-power configurable multiple function gate
74AUP1G97 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Product data sheet Rev. 10 — 28 March 2017
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3 Ordering information
Table 1. Ordering information
PackageType number
Temperature
range
Name Description Version
74AUP1G97GW -40 °C to +125 °C SC-88 plastic surface-mounted package; 6 leads SOT363
74AUP1G97GM -40 °C to +125 °C XSON6 plastic extremely thin small outline package; no leads;
6 terminals; body 1 x 1.45 x 0.5 mm
SOT886
74AUP1G97GF -40 °C to +125 °C XSON6 plastic extremely thin small outline package; no leads;
6 terminals; body 1 x 1 x 0.5 mm
SOT891
74AUP1G97GN -40 °C to +125 °C XSON6 extremely thin small outline package; no leads;
6 terminals; body 0.9 x 1.0 x 0.35 mm
SOT1115
74AUP1G97GS -40 °C to +125 °C XSON6 extremely thin small outline package; no leads;
6 terminals; body 1.0 x 1.0 x 0.35 mm
SOT1202
74AUP1G97GX -40 °C to +125 °C X2SON6 plastic thermal extremely thin small outline package;
no leads; 6 terminals; body 1 x 0.8 x 0.35 mm
SOT1255
74AUP1G97UK -40 °C to +125 °C WLCSP6 wafer level chip-scale package; 6 bumps;
0.65 x 0.44 x 0.27 mm
SOT1454-1
4 Marking
Table 2. Marking
Type number Marking code [1]
74AUP1G97GW aV
74AUP1G97GM aV
74AUP1G97GF aV
74AUP1G97GN aV
74AUP1G97GS aV
74AUP1G97GX aV
74AUP1G97UK 7
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
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Nexperia 74AUP1G97
Low-power configurable multiple function gate
74AUP1G97 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Product data sheet Rev. 10 — 28 March 2017
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5 Functional diagram
001aad998
A
Y
4
B
C
3
1
6
Figure 1. Logic symbol
6 Pinning information
6.1 Pinning
74AUP1G97
B C
GND
A Y
001aad999
1
2
3
6
VCC
5
4
Figure 2. Pin configuration SOT363 (SC-88)
74AUP1G97
GND
001aae000
B
A
VCC
C
Y
Transparent top view
2
3
1
5
4
6
Figure 3. Pin configuration SOT886 (XSON6)
74AUP1G97
GND
001aae001
B
A
VCC
C
Y
Transparent top view
2
3
1
5
4
6
Figure 4. Pin configuration SOT891, SOT1115 and
SOT1202 (XSON6)
6
VCCGND
4
1
3
2
B C
A Y
5
74AUP1G97
Transparent top view
aaa-019827
Figure 5. Pin configuration SOT1255 (X2SON6)
aaa-026278
A
21
B
C
Transparent top view
74AUP1G97UK
ball A1
index area
Figure 6. Pin configuration SOT1454-1 (WLCSP6)
aaa-026279
A
21
CB
VCC
GND
YA
B
C
Transparent top view
74AUP1G97UK
Figure 7. Ball mapping for SOT1454-1 (WLCSP6)
74AUP1GQ7 Table 3. Pin description Table 4. Function selection table Figure 8 Figure 9 Figure 10 Figure 10 Figure 11 Figure 11 Figure 12 Figure 13 ammunz Figure 14 ,7, 0013590173
Nexperia 74AUP1G97
Low-power configurable multiple function gate
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Product data sheet Rev. 10 — 28 March 2017
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6.2 Pin description
Table 3. Pin description
PinSymbol
SC88, XSON6 and X2SON6 WLCSP6
Description
B 1 A1 data input
GND 2 B1 ground (0 V)
A 3 C1 data input
Y 4 C2 data output
VCC 5 B2 supply voltage
C 6 A2 data input
7 Logic configurations
Table 4. Function selection table
Logic function Figure
2-input MUX see Figure 8
2-input AND see Figure 9
2-input OR with one input inverted see Figure 10
2-input NAND with one input inverted see Figure 10
2-input AND with one input inverted see Figure 11
2-input NOR with one input inverted see Figure 11
2-input OR see Figure 12
Inverter see Figure 13
Buffer see Figure 14
001aae002
1
2
3
6
5
4 Y
VCC
CB
A
B
A
C
Y
Figure 8. 2-input MUX
Figure 9. 2-input AND gate
74AUP1GQ7 Ji**m 1}; sssss 1 RLLW @‘Ff; ,,,,, aaaaaaa
Nexperia 74AUP1G97
Low-power configurable multiple function gate
74AUP1G97 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Product data sheet Rev. 10 — 28 March 2017
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Figure 10. 2-input NAND gate with input A inverted or 2-
input OR gate with input C inverted
Figure 11. 2-input NOR gate with input B inverted or 2-
input AND gate with input C inverted
Figure 12. 2-input OR gate
001aae007
1
2
3
6
5
4 Y
YC
VCC
C
Figure 13. Inverter
001aae008
1
2
3
6
5
4 Y
YB
B
VCC
Figure 14. Buffer
8 Functional description
Table 5. Function table [1]
Input Output
CBAY
LLLL
L L H L
L H L H
L H H H
H L L L
H L H H
H H L L
HHHH
[1] H = HIGH voltage level; L = LOW voltage level.
74AUP1GQ7 Table 7. Recommended operating conditions
Nexperia 74AUP1G97
Low-power configurable multiple function gate
74AUP1G97 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Product data sheet Rev. 10 — 28 March 2017
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9 Limiting values
Table 6. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage -0.5 +4.6 V
IIK input clamping current VI < 0 V -50 - mA
VIinput voltage [1] -0.5 +4.6 V
IOK output clamping current VO < 0 V -50 - mA
VOoutput voltage Active mode and Power-down
mode
[1] -0.5 +4.6 V
IOoutput current VO = 0 V to VCC - ±20 mA
ICC supply current - 50 mA
IGND ground current -50 - mA
Tstg storage temperature -65 +150 °C
Ptot total power dissipation Tamb = -40 °C to +125 °C [2] - 250 mW
[1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SC-88 package: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.
For X2SON6 and XSON6 packages: above 118 °C the value of Ptot derates linearly with 7.8 mW/K.
For WLCSP6 package: above 102.5 °C the value of Ptot derates linearly with 5.3 mW/K.
10 Recommended operating conditions
Table 7. Recommended operating conditions
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.8 3.6 V
VIinput voltage 0 3.6 V
Active mode 0 VCC VVOoutput voltage
Power-down mode; VCC = 0 V 0 3.6 V
Tamb ambient temperature -40 +125 °C
74AUP1GQ7
Nexperia 74AUP1G97
Low-power configurable multiple function gate
74AUP1G97 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Product data sheet Rev. 10 — 28 March 2017
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11 Static characteristics
Table 8. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ Max Unit
Tamb = 25 °C
VI = VT+ or VT-
IO = -20 μA; VCC = 0.8 V to 3.6 V VCC - 0.1 - - V
IO = -1.1 mA; VCC = 1.1 V 0.75VCC - - V
IO = -1.7 mA; VCC = 1.4 V 1.11 - - V
IO = -1.9 mA; VCC = 1.65 V 1.32 - - V
IO = -2.3 mA; VCC = 2.3 V 2.05 - - V
IO = -3.1 mA; VCC = 2.3 V 1.9 - - V
IO = -2.7 mA; VCC = 3.0 V 2.72 - - V
VOH HIGH-level output
voltage
IO = -4.0 mA; VCC = 3.0 V 2.6 - - V
VI = VT+ or VT-
IO = 20 μA; VCC = 0.8 V to 3.6 V - - 0.1 V
IO = 1.1 mA; VCC = 1.1 V - - 0.3VCC V
IO = 1.7 mA; VCC = 1.4 V - - 0.31 V
IO = 1.9 mA; VCC = 1.65 V - - 0.31 V
IO = 2.3 mA; VCC = 2.3 V - - 0.31 V
IO = 3.1 mA; VCC = 2.3 V - - 0.44 V
IO = 2.7 mA; VCC = 3.0 V - - 0.31 V
VOL LOW-level output
voltage
IO = 4.0 mA; VCC = 3.0 V - - 0.44 V
IIinput leakage
current
VI = GND to 3.6 V;
VCC = 0 V to 3.6 V
- - ±0.1 μA
IOFF power-off leakage
current
VI or VO = 0 V to 3.6 V; VCC = 0 V - - ±0.2 μA
ΔIOFF additional power-off
leakage current
VI or VO = 0 V to 3.6 V;
VCC = 0 V to 0.2 V
- - ±0.2 μA
ICC supply current VI = GND or VCC; IO = 0 A;
VCC = 0.8 V to 3.6 V
- - 0.5 μA
ΔICC additional supply
current
VI = VCC - 0.6 V; IO = 0 A; VCC = 3.3 V [1] - - 40 μA
CIinput capacitance VCC = 0 V to 3.6 V; VI = GND or VCC - 1.1 - pF
COoutput capacitance VO = GND; VCC = 0 V - 1.7 - pF
Tamb = -40 °C to +85 °C
VI = VT+ or VT-
IO = -20 μA; VCC = 0.8 V to 3.6 V VCC - 0.1 - - V
VOH HIGH-level output
voltage
IO = -1.1 mA; VCC = 1.1 V 0.7VCC - - V
74AUP1GQ7
Nexperia 74AUP1G97
Low-power configurable multiple function gate
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Product data sheet Rev. 10 — 28 March 2017
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Symbol Parameter Conditions Min Typ Max Unit
IO = -1.7 mA; VCC = 1.4 V 1.03 - - V
IO = -1.9 mA; VCC = 1.65 V 1.30 - - V
IO = -2.3 mA; VCC = 2.3 V 1.97 - - V
IO = -3.1 mA; VCC = 2.3 V 1.85 - - V
IO = -2.7 mA; VCC = 3.0 V 2.67 - - V
IO = -4.0 mA; VCC = 3.0 V 2.55 - - V
VI = VT+ or VT-
IO = 20 μA; VCC = 0.8 V to 3.6 V - - 0.1 V
IO = 1.1 mA; VCC = 1.1 V - - 0.3VCC V
IO = 1.7 mA; VCC = 1.4 V - - 0.37 V
IO = 1.9 mA; VCC = 1.65 V - - 0.35 V
IO = 2.3 mA; VCC = 2.3 V - - 0.33 V
IO = 3.1 mA; VCC = 2.3 V - - 0.45 V
IO = 2.7 mA; VCC = 3.0 V - - 0.33 V
VOL LOW-level output
voltage
IO = 4.0 mA; VCC = 3.0 V - - 0.45 V
IIinput leakage
current
VI = GND to 3.6 V;
VCC = 0 V to 3.6 V
- - ±0.5 μA
IOFF power-off leakage
current
VI or VO = 0 V to 3.6 V; VCC = 0 V - - ±0.5 μA
ΔIOFF additional power-off
leakage current
VI or VO = 0 V to 3.6 V;
VCC = 0 V to 0.2 V
- - ±0.6 μA
ICC supply current VI = GND or VCC; IO = 0 A;
VCC = 0.8 V to 3.6 V
- - 0.9 μA
ΔICC additional supply
current
VI = VCC - 0.6 V; IO = 0 A; VCC = 3.3 V [1] - - 50 μA
Tamb = -40 °C to +125 °C
VI = VT+ or VT-
IO = -20 μA; VCC = 0.8 V to 3.6 V VCC - 0.11 - - V
IO = -1.1 mA; VCC = 1.1 V 0.6VCC - - V
IO = -1.7 mA; VCC = 1.4 V 0.93 - - V
IO = -1.9 mA; VCC = 1.65 V 1.17 - - V
IO = -2.3 mA; VCC = 2.3 V 1.77 - - V
IO = -3.1 mA; VCC = 2.3 V 1.67 - - V
IO = -2.7 mA; VCC = 3.0 V 2.40 - - V
VOH HIGH-level output
voltage
IO = -4.0 mA; VCC = 3.0 V 2.30 - - V
VI = VT+ or VT-
IO = 20 μA; VCC = 0.8 V to 3.6 V - - 0.11 V
VOL LOW-level output
voltage
IO = 1.1 mA; VCC = 1.1 V - - 0.33VCC V
74AUP1GQ7 Figure 16 Figure 15 Figure 15
Nexperia 74AUP1G97
Low-power configurable multiple function gate
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Product data sheet Rev. 10 — 28 March 2017
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Symbol Parameter Conditions Min Typ Max Unit
IO = 1.7 mA; VCC = 1.4 V - - 0.41 V
IO = 1.9 mA; VCC = 1.65 V - - 0.39 V
IO = 2.3 mA; VCC = 2.3 V - - 0.36 V
IO = 3.1 mA; VCC = 2.3 V - - 0.50 V
IO = 2.7 mA; VCC = 3.0 V - - 0.36 V
IO = 4.0 mA; VCC = 3.0 V - - 0.50 V
IIinput leakage
current
VI = GND to 3.6 V;
VCC = 0 V to 3.6 V
- - ±0.75 μA
IOFF power-off leakage
current
VI or VO = 0 V to 3.6 V; VCC = 0 V - - ±0.75 μA
ΔIOFF additional power-off
leakage current
VI or VO = 0 V to 3.6 V;
VCC = 0 V to 0.2 V
- - ±0.75 μA
ICC supply current VI = GND or VCC; IO = 0 A;
VCC = 0.8 V to 3.6 V
- - 1.4 μA
ΔICC additional supply
current
VI = VCC - 0.6 V; IO = 0 A; VCC = 3.3 V [1] - - 75 μA
[1] One input at VCC - 0.6 V, other input at VCC or GND.
12 Dynamic characteristics
Table 9. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 16.
25 °C -40 °C to +125 °CSymbol Parameter Conditions
Min Typ[1] Max Min Max
(85 °C)
Max
(125 °C)
Unit
CL = 5 pF
A, B, C to Y; see Figure 15 [2]
VCC = 0.8 V - 23.0 - - - - ns
VCC = 1.1 V to 1.3 V 2.8 6.6 12.6 2.5 13.0 13.2 ns
VCC = 1.4 V to 1.6 V 2.3 4.7 7.6 2.5 8.2 8.6 ns
VCC = 1.65 V to 1.95 V 2.2 3.9 6.2 2.0 6.8 7.2 ns
VCC = 2.3 V to 2.7 V 2.0 3.2 4.5 1.7 5.1 5.3 ns
tpd propagation delay
VCC = 3.0 V to 3.6 V 1.9 2.9 3.9 1.5 4.1 4.3 ns
CL = 10 pF
A, B, C to Y; see Figure 15 [2]
VCC = 0.8 V - 26.6 - - - - ns
VCC = 1.1 V to 1.3 V 3.2 7.4 14.3 2.9 14.9 15.2 ns
VCC = 1.4 V to 1.6 V 2.6 5.3 8.7 2.8 9.4 9.8 ns
tpd propagation delay
VCC = 1.65 V to 1.95 V 2.5 4.5 7.0 2.3 7.8 8.2 ns
74AUP1GQ7 Figure 15 Figure 15
Nexperia 74AUP1G97
Low-power configurable multiple function gate
74AUP1G97 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Product data sheet Rev. 10 — 28 March 2017
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25 °C -40 °C to +125 °CSymbol Parameter Conditions
Min Typ[1] Max Min Max
(85 °C)
Max
(125 °C)
Unit
VCC = 2.3 V to 2.7 V 2.4 3.7 5.2 2.1 5.9 6.1 ns
VCC = 3.0 V to 3.6 V 2.3 3.4 4.6 1.9 4.9 5.1 ns
CL = 15 pF
A, B, C to Y; see Figure 15 [2]
VCC = 0.8 V - 30.1 - - - - ns
VCC = 1.1 V to 1.3 V 3.6 8.2 16.0 3.2 16.7 17.0 ns
VCC = 1.4 V to 1.6 V 2.9 5.9 9.6 3.1 10.4 10.9 ns
VCC = 1.65 V to 1.95 V 2.8 5.0 7.8 2.5 8.7 9.1 ns
VCC = 2.3 V to 2.7 V 2.7 4.2 5.8 2.4 6.5 6.9 ns
tpd propagation delay
VCC = 3.0 V to 3.6 V 2.5 3.8 5.1 2.2 5.5 5.7 ns
CL = 30 pF
A, B, C to Y; see Figure 15 [2]
VCC = 0.8 V - 38.3 - - - - ns
VCC = 1.1 V to 1.3 V 4.6 10.5 20.9 4.0 21.8 22.2 ns
VCC = 1.4 V to 1.6 V 3.7 7.4 12.2 3.8 13.3 14.0 ns
VCC = 1.65 V to 1.95 V 3.5 6.3 9.9 3.2 11.1 11.8 ns
VCC = 2.3 V to 2.7 V 3.4 5.3 7.4 3.1 8.3 8.8 ns
tpd propagation delay
VCC = 3.0 V to 3.6 V 3.2 4.9 6.6 2.8 7.0 7.4 ns
CL = 5 pF, 10 pF, 15 pF and 30 pF
fi = 1 MHz; VI = GND to VCC [3]
VCC = 0.8 V - 2.6 - - - - pF
VCC = 1.1 V to 1.3 V - 2.8 - - - - pF
VCC = 1.4 V to 1.6 V - 2.9 - - - - pF
VCC = 1.65 V to 1.95 V - 3.1 - - - - pF
VCC = 2.3 V to 2.7 V - 3.7 - - - - pF
CPD power dissipation
capacitance
VCC = 3.0 V to 3.6 V - 4.3 - - - - pF
[1] All typical values are measured at nominal VCC.
[2] tpd is the same as tPLH and tPHL
[3] CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD x VCC2 x fi x N + ∑(CL x VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL × VCC2 × fo) = sum of outputs.
74AUP1GQ7 Table 10
Nexperia 74AUP1G97
Low-power configurable multiple function gate
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Product data sheet Rev. 10 — 28 March 2017
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12.1 Waveforms and test circuit
Y output
A, B, C input
Y output
GND
VI
VOH
VOH
VOL
VOL
VMVM
VMVM
VMVM
tPLH
tPLH
tPHL
tPHL
001aab593
Measurement points are given in Table 10.
VOL and VOH are typical output voltage levels that occur with the output load.
Figure 15. Input A, B and C to output Y propagation delay times
Table 10. Measurement points
Supply voltage Output Input
VCC VMVMVItr = tf
0.8 V to 3.6 V 0.5VCC 0.5VCC VCC ≤ 3.0 ns
74AUP1GQ7
Nexperia 74AUP1G97
Low-power configurable multiple function gate
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Product data sheet Rev. 10 — 28 March 2017
12 / 25
001aac521
DUT
RT
VIVO
VEXT
VCC
RL
5 kΩ
CL
G
Test data is given inTable 11.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Figure 16. Test circuit for measuring switching times
Table 11. Test data
Supply voltage Load VEXT
VCC CLRL [1] tPLH, tPHL tPZH, tPHZ tPZL, tPLZ
0.8 V to 3.6 V 5 pF, 10 pF, 15 pF and 30 pF 5 kΩ or 1 MΩ open GND 2VCC
[1] For measuring enable and disable times RL = 5 kΩ, for measuring propagation delays, setup and hold times and pulse width RL = 1 MΩ.
74AUP1GQ7 Figure 16 Figure 17 Figure 18 Figure 17 Figure 18 , T, Figure 17 Figure 18 Figure 19 Figure 20
Nexperia 74AUP1G97
Low-power configurable multiple function gate
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Product data sheet Rev. 10 — 28 March 2017
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12.2 Transfer characteristics
Table 12. Transfer characteristics
Voltages are referenced to GND (ground = 0 V; for test circuit see Figure 16.
25 °C -40 °C to +125 °CSymbol Parameter Conditions
Min Typ Max Min Max
(85 °C)
Max
(125 °C)
Unit
see Figure 17 and Figure 18
VCC = 0.8 V 0.30 - 0.60 0.30 0.60 0.62 V
VCC = 1.1 V 0.53 - 0.90 0.53 0.90 0.92 V
VCC = 1.4 V 0.74 - 1.11 0.74 1.11 1.13 V
VCC = 1.65 V 0.91 - 1.29 0.91 1.29 1.31 V
VCC = 2.3 V 1.37 - 1.77 1.37 1.77 1.80 V
VT+ positive-going
threshold voltage
VCC = 3.0 V 1.88 - 2.29 1.88 2.29 2.32 V
see Figure 17 and Figure 18
VCC = 0.8 V 0.10 - 0.60 0.10 0.60 0.60 V
VCC = 1.1 V 0.26 - 0.65 0.26 0.65 0.65 V
VCC = 1.4 V 0.39 - 0.75 0.39 0.75 0.75 V
VCC = 1.65 V 0.47 - 0.84 0.47 0.84 0.84 V
VCC = 2.3 V 0.69 - 1.04 0.69 1.04 1.04 V
VT- negative-going
threshold voltage
VCC = 3.0 V 0.88 - 1.24 0.88 1.24 1.24 V
(VT+ - VT-); see Figure 17
and Figure 18, Figure 19
and Figure 20
VCC = 0.8 V 0.07 - 0.50 0.07 0.50 0.50 V
VCC = 1.1 V 0.08 - 0.46 0.08 0.46 0.46 V
VCC = 1.4 V 0.18 - 0.56 0.18 0.56 0.56 V
VCC = 1.65 V 0.27 - 0.66 0.27 0.66 0.66 V
VCC = 2.3 V 0.53 - 0.92 0.53 0.92 0.92 V
VHhysteresis
voltage
VCC = 3.0 V 0.79 - 1.31 0.79 1.31 1.31 V
74AUP1GQ7 "WEEDS r7 7. mna207 001554592 nmaamam
Nexperia 74AUP1G97
Low-power configurable multiple function gate
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Product data sheet Rev. 10 — 28 March 2017
14 / 25
12.3 Waveforms transfer characteristics
mna207
VO
VI
VH
VT+
VT-
Figure 17. Transfer characteristic
mna208
VO
VIVH
VT+
VT-
VT+ and VT- limits at 70 % and 20 %.
Figure 18. Definition of VT+, VT- and VH
VI(V)
0 2.01.60.8 1.20.4
001aad691
80
160
240
ICC
(µA)
0
Figure 19. Typical transfer characteristics; VCC = 1.8 V
001aad692
VI(V)
0 3.02.01.0
400
800
1200
ICC
(µA)
0
Figure 20. Typical transfer characteristics; VCC = 3.0 V
74AUP1GQ7 Plastic surface-mounted package; 6 leads SOT363 E©W
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Low-power configurable multiple function gate
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13 Package outline
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT363 SC-88
w BM
bp
D
e1
e
pin 1
index A
A1
Lp
Q
detail X
HE
E
vMA
AB
y
0 1 2 mm
scale
c
X
1 32
456
Plastic surface-mounted package; 6 leads SOT363
UNIT A1
max bpc D Ee1HELpQ ywv
mm 0.1 0.30
0.20
2.2
1.8
0.25
0.10
1.35
1.15 0.65
e
1.3 2.2
2.0 0.2 0.10.2
DIMENSIONS (mm are the original dimensions)
0.45
0.15
0.25
0.15
A
1.1
0.8
04-11-08
06-03-16
Figure 21. Package outline SOT363 (SC-88)
74AUP1GQ7 xsoNe mash: extreme‘y mm smaH oulhne package‘ nu beds, a lemuna‘s. budy 1 x 1 45 x u 5 mm SOTssa ? T? 7}77+77 ,,,,,, 7 L ;: 7+ 717 LEJ7EJ :7 L
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Low-power configurable multiple function gate
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References
Outline
version
European
projection Issue date
IEC JEDEC JEITA
SOT886 MO-252
sot886_po
04-07-22
12-01-05
Unit
mm
max
nom
min
0.5 0.04 1.50
1.45
1.40
1.05
1.00
0.95
0.35
0.30
0.27
0.40
0.35
0.32
0.6
A(1)
Dimensions (mm are the original dimensions)
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm SOT886
A1b
0.25
0.20
0.17
D E e e1
0.5
L L1
terminal 1
index area
D
E
e1
e
A1
b
L
L1
e1
0 1 2 mm
scale
1
6
2
5
3
4
6x
(2)
4x
(2)
A
Figure 22. Package outline SOT886 (XSON6)
74AUP1GQ7 xsous: plastic extremely min small outline package; no leads; 6 terminals; body 1 x1 x 0.5 mm 507391 ;E E , E ,,,,, E EEEE E3 EE? 3 \ |_| 7 A X i» r' A E E E ,ii,+,ii,g i i E O 1 2
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Low-power configurable multiple function gate
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Product data sheet Rev. 10 — 28 March 2017
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terminal 1
index area
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT891
SOT891
05-04-06
07-05-15
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm
D
E
e1
e
A1
b
L
L1
e1
0 1 2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
mm 0.20
0.12
1.05
0.95
0.35
0.27
A1
max b E
1.05
0.95
D e e1L
0.40
0.32
L1
0.350.55
A
max
0.5 0.04
1
6
2
5
3
4
A
6×
(1)
4×
(1)
Note
1. Can be visible in some manufacturing processes.
Figure 23. Package outline SOT891 (XSON6)
74AUP1GQ7 xsous: extremely min small outline package; no leads; U Ewfl U , L i 1 \fi‘aw E© 49-94—62—
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Low-power configurable multiple function gate
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References
Outline
version
European
projection Issue date
IEC JEDEC JEITA
SOT1115
sot1115_po
10-04-02
10-04-07
Unit
mm
max
nom
min
0.35 0.04 0.95
0.90
0.85
1.05
1.00
0.95
0.55 0.3
0.40
0.35
0.32
A(1)
Dimensions
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
XSON6: extremely thin small outline package; no leads;
6 terminals; body 0.9 x 1.0 x 0.35 mm SOT1115
A1b
0.20
0.15
0.12
D E e e1L
0.35
0.30
0.27
L1
0 0.5 1 mm
scale
terminal 1
index area
D
E
(4×)(2)
e1e1
e
L
L1
b
321
6 5 4
(6×)(2)
A1A
Figure 24. Package outline SOT1115 (XSON6)
74AUP1GQ7 pg4kgax a© 49-94—62—
Nexperia 74AUP1G97
Low-power configurable multiple function gate
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Product data sheet Rev. 10 — 28 March 2017
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References
Outline
version
European
projection Issue date
IEC JEDEC JEITA
SOT1202
sot1202_po
10-04-02
10-04-06
Unit
mm
max
nom
min
0.35 0.04 1.05
1.00
0.95
1.05
1.00
0.95
0.55 0.35
0.40
0.35
0.32
A(1)
Dimensions
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
XSON6: extremely thin small outline package; no leads;
6 terminals; body 1.0 x 1.0 x 0.35 mm SOT1202
A1b
0.20
0.15
0.12
D E e e1L
0.35
0.30
0.27
L1
0 0.5 1 mm
scale
terminal 1
index area
D
E
(4×)(2)
e1e1
e
L
b
1 2 3
L1
6 5 4
(6×)(2)
A
A1
Figure 25. Package outline SOT1202 (XSON6)
74AUP1GQ7 xzsous: plastic thermal enhanced extremely thin small outline package: no leads; \ l l l [l l Ch 7 T— | l l 1 \ .7D4.‘ L F “‘—_ “ E@ W
Nexperia 74AUP1G97
Low-power configurable multiple function gate
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Product data sheet Rev. 10 — 28 March 2017
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References
Outline
version
European
projection Issue date
IEC JEDEC JEITA
SOT1255
sot1255_po
15-07-20
15-07-22
Unit
mm
max
nom
min
0.35 0.04 0.30 0.85
0.20 0.10 0.05
A
Dimensions (mm are the original dimensions)
X2SON6: plastic thermal enhanced extremely thin small outline package; no leads;
6 terminals; body 1.0 x 0.8 x 0.35 mm SOT1255
A1D
1.05
DhE e1e2b
0.25
L v y
0.05
y1
0.32 0.02 0.25 0.80 0.60 0.401.00
0.170.220.30 0.00 0.22 0.750.95
0.250.30
0 1 mm
scale
A B
pin 1
ID area
X
L
(4x)
e1
1 6
Dh
(2x)
3 4
52
e2
AB
v
D
E
C
y
C
y1
detail X
A
A1
b
(4x)
Figure 26. Package outline SOT1255 (X2SON6)
74AUP1GQ7 WLCSPG: waler level chip-scale package, 5 bumps; 0.55 x 0.44 x 0.21 mm 50714544 r—IEI ? i 1 1 7,7777, A \ i i l P 90 Em) C A E 7, T MLW ‘ ‘ Ill E@ 454%
Nexperia 74AUP1G97
Low-power configurable multiple function gate
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References
Outline
version
European
projection Issue date
IEC JEDEC JEITA
SOT1454-1 - - -
sot1454-1_po
15-11-16
14-12-16
Unit
mm
max
nom
min
0.100 0.68 0.47
0.15 0.05
A
Dimensions (mm are the original dimensions)
WLCSP6: wafer level chip-scale package, 6 bumps; 0.65 x 0.44 x 0.27 mm SOT1454-1
A1A2
0.22
0.18
0.085 0.65 0.44 0.22
b D E e e1
0.23
e2
0.44
v w
0.05
y
0.1
y1
0.070 0.62 0.41
0.30
0.27
0.24
0.20
0.085
0.055
0.070
X
detail X
0
scale
1 mm
A
EB
D
e2
e
e1
bAC BØ v
CØ w
21
B
C
y
A
A2
A1
C
A
ball A1
index area
ball A1
index area
C
y1
Figure 27. Package outline SOT1454-1 (WLCSP6)
74AUP1GQ7 Table 13. Revision history Table 14. Abbreviations
Nexperia 74AUP1G97
Low-power configurable multiple function gate
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Product data sheet Rev. 10 — 28 March 2017
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14 Revision history
Table 13. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74AUP1G97 v.10 20170328 Product data sheet - 74AUP1G97 v.9
Modifications: Added type number 74AUP1G97UK (SOT1454-1/WLCSP6).
74AUP1G97 v.9 20150917 Product data sheet - 74AUP1G97 v.8
Modifications: Added type number 74AUP1G97GX (SOT1255/X2SON6).
74AUP1G97 v.8 20120815 Product data sheet - 74AUP1G97 v.7
Modifications: Package outline drawing of SOT886 (Figure 22) modified.
74AUP1G97 v.7 20111128 Product data sheet - 74AUP1G97 v.6
74AUP1G97 v.6 20110110 Product data sheet - 74AUP1G97 v.5
74AUP1G97 v.5 20101020 Product data sheet - 74AUP1G97 v.4
74AUP1G97 v.4 20090623 Product data sheet - 74AUP1G97 v.3
74AUP1G97 v.3 20090518 Product data sheet - 74AUP1G97 v.2
74AUP1G97 v.2 20090327 Product data sheet - 74AUP1G97 v.1
74AUP1G97 v.1 20061107 Product data sheet - -
14.1 Abbreviations
Table 14. Abbreviations
Acronym Description
CDM Charged Device Model
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
74AUP1GQ7 Ince mis dacumenl was pu mg llwww neggenamm
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Low-power configurable multiple function gate
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15 Legal information
15.1 Data sheet status
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product
development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple
devices. The latest product status information is available on the Internet at URL http://www.nexperia.com.
15.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the
relevant full data sheet, which is available on request via the local Nexperia
sales office. In case of any inconsistency or conflict with the short data sheet,
the full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
15.3 Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
of Nexperia. In no event shall Nexperia be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation -
lost profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory. Notwithstanding any damages that
customer might incur for any reason whatsoever, Nexperia's aggregate and
cumulative liability towards customer for the products described herein shall
be limited in accordance with the Terms and conditions of commercial sale of
Nexperia.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Suitability for use — Nexperia products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
systems or equipment, nor in applications where failure or malfunction
of an Nexperia product can reasonably be expected to result in personal
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification. Customers are responsible for the
design and operation of their applications and products using Nexperia
products, and Nexperia accepts no liability for any assistance with
applications or customer product design. It is customer’s sole responsibility
to determine whether the Nexperia product is suitable and fit for the
customer’s applications and products planned, as well as for the planned
application and use of customer’s third party customer(s). Customers should
provide appropriate design and operating safeguards to minimize the risks
associated with their applications and products. Nexperia does not accept
any liability related to any default, damage, costs or problem which is based
on any weakness or default in the customer’s applications or products, or
the application or use by customer’s third party customer(s). Customer is
responsible for doing all necessary testing for the customer’s applications
and products using Nexperia products in order to avoid a default of the
applications and the products or of the application or use by customer’s third
party customer(s). Nexperia does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement is
concluded only the terms and conditions of the respective agreement shall
apply. Nexperia hereby expressly objects to applying the customer’s general
terms and conditions with regard to the purchase of Nexperia products by
customer.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or
the grant, conveyance or implication of any license under any copyrights,
patents or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
74AUP1GQ7
Nexperia 74AUP1G97
Low-power configurable multiple function gate
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Product data sheet Rev. 10 — 28 March 2017
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Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified, the
product is not suitable for automotive use. It is neither qualified nor tested in
accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of non-automotive qualified
products in automotive equipment or applications. In the event that customer
uses the product for design-in and use in automotive applications to
automotive specifications and standards, customer (a) shall use the product
without Nexperia's warranty of the product for such automotive applications,
use and specifications, and (b) whenever customer uses the product for
automotive applications beyond Nexperia's specifications such use shall be
solely at customer’s own risk, and (c) customer fully indemnifies Nexperia
for any liability, damages or failed product claims resulting from customer
design and use of the product for automotive applications beyond Nexperia's
standard warranty and Nexperia's product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
15.4 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
74AUP1GQ7
Nexperia 74AUP1G97
Low-power configurable multiple function gate
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section 'Legal information'.
© Nexperia B.V. 2017. All rights reserved.
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 28 March 2017
Document identifier: 74AUP1G97
Contents
1 General description ............................................ 1
2 Features and benefits .........................................1
3 Ordering information .......................................... 2
4 Marking .................................................................2
5 Functional diagram ............................................. 3
6 Pinning information ............................................ 3
6.1 Pinning ...............................................................3
6.2 Pin description ................................................... 4
7 Logic configurations ...........................................4
8 Functional description ........................................5
9 Limiting values ....................................................6
10 Recommended operating conditions ................ 6
11 Static characteristics .......................................... 7
12 Dynamic characteristics .....................................9
12.1 Waveforms and test circuit .............................. 11
12.2 Transfer characteristics ................................... 13
12.3 Waveforms transfer characteristics ..................14
13 Package outline .................................................15
14 Revision history ................................................ 22
14.1 Abbreviations ................................................... 22
15 Legal information .............................................. 23

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