SI91871 Datasheet by Vishay Siliconix

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Si91871
Vishay Siliconix
Document Number: 72012
S-51147—Rev. F, 20-Jun-05
www.vishay.com
1
300-mA Ultra Low-Noise LDO Regulator
With Discharge Option
FEATURES
DUltra Low Dropout—300 mV at 300-mA Load
DUltra Low Noise—30 mVRMS (10-Hz to 100-kHz)
DShutdown Control
D130-mA Ground Current at 300-mA Load
D1.5% Guaranteed Output Voltage Accuracy
D400-mA Peak Output Current Capability
DUses Low ESR Ceramic Capacitors
DFast Start-Up (50 ms)
DFast Line and Load Transient Response (v 30 ms)
D1-mA Maximum Shutdown Current
DOutput Current Limit
DReverse Battery Protection
DBuilt-in Short Circuit and Thermal Protection
DOutput, Auto-Discharge In Shutdown Mode
DFixed 1.2, 1.8, 2.5, 2.6, 2.8, 3.0, 3.3, 5.0-V Output
Voltage Options
DMLP33-5 PowerPAKr Package
APPLICATIONS
DCellular Phones, Wireless Handsets
DNoise-Sensitive Electronic Systems, Laptop and
Palmtop Computers
DPDAs
DPagers
DDigital Cameras
DMP3 Player
DWireless Modem
DESCRIPTION
The Si91871 is a 300-mA CMOS LDO (low dropout) voltage
regulator. It is the perfect choice for low voltage, low power
applications. An ultra low ground current makes this part
attractive for battery operated power systems. The Si91871
also offers ultra low dropout voltage to prolong battery life in
portable electronics. Systems requiring a quiet voltage
source, such as RF applications, will benefit from the
Si91871’s ultra low output noise. An external noise bypass
capacitor connected to the device’s BP pin can further reduce
the noise level. The Si91871 is designed to maintain regulation
while delivering 400-mA peak current, making it ideal for
systems that have a high surge current upon turn-on.
For better transient response and regulation, an active
pull-down circuit is built into the Si91871 to clamp the output
voltage when it rises beyond normal regulation. The Si91871
automatically discharges the output voltage by connecting the
output to ground through a 100-W n-channel MOSFET when
the device is put in shutdown mode.
The Si91871 features reverse battery protection to limit
reverse current flow to approximately 1-mA in the event
reversed battery is applied at the input, thus preventing
damage to the IC.
The Si91871 is available in both the standard and
lead (Pb)-free 5-pin MLP33 PowerPAK packages and is
specified to operate over the industrial temperature range of
40_C to 85_.
TYPICAL APPLICATION CIRCUIT
MLP33-5
Si91871
VIN
GND
SD
VOUT
VIN
SD
VOUT
2.2 mF
BP
10 nF
2.2 mF
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Si91871
Vishay Siliconix
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Document Number: 72012
S-51147—Rev. F, 20-Jun-05
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings
Input Voltage, VIN to GND 6.0 to 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VSD (See Detailed Description) 0.3 V to VIN
. . . . . . . . . . . . . . . . . . . . . . . . . .
Output Current, IOUT Short Circuit Protected. . . . . . . . . . . . . . . . . . . . . . . . . .
Output Voltage, VOUT 0.3 V to VIN + 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package Power Dissipation, (Pd)b2.3 W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Resistance (qJA)a55_C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
R(qJA)a8_C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature, TJ(max) 150_C. . . . . . . . . . . . . . . . . . . . . . .
Storage Temperature, TSTG 65_C to 150_C. . . . . . . . . . . . . . . . . . . . . . . . . .
Notes
a. Device mounted with all leads soldered or welded to PC board.
b. Derate 20 mW/_C above TA = 25_C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
Input Voltage, VIN 2 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Voltage, VSD 0 V to VIN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Current 0 to 300 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CIN, COUT
a (Ceramic) 2.2 mF. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CEB (Ceramic) 0.01 mF. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Ambient Temperature, TA40_C to 85_C. . . . . . . . . . . . . . . . . . . .
Operating Junction Temperature, TJ40_C to 125_C. . . . . . . . . . . . . . . . . . .
Notes
a. Maximum ESR of COUT: 0.2 W.
SPECIFICATIONS
Test Conditions Unless Specified
TA = 25_C, VIN = VOUT(nom) + 1 V
C C
Limits
40 to 85_C
Parameter Symbol
()
IOUT = 1 mA, CIN = 2 mF, COUT = 2.0 mF
VSD = 1.5 V TempaMinbTypcMaxbUnit
Start-Up BP Current IOUT ON/OFF = High Room 1 mA
Input Voltage Range VIN Full 2 6 V
VOUT w 18 V
Room 2.0 1 2.0
Output Voltage Accuracy
1 mA v IOUT v 300 mA
VOUT w 1.8 V Full 3.0 1 3.0
%
Output Voltage Accuracy 1 mA v IOUT v 300 mA
VOUT = 1 2 V 1 5 V
Room 2.5 1 2.5 %
VOUT = 1.2 V, 1.5 V Full 3.5 1 3.5
Line Regulation (VOUT v 3 V) Full 0.06 0.18
Line Regulation
(3.0 V < VOUT v3.6 V)
DVOUT 100
DVIN VOUT(nom)
From VIN = VOUT(nom) + 1 V to VOUT(nom) + 2 V
Full 0 0.3 %/V
Line Regulation (5-V Version)
IN OUT(nom)
From VIN = 5.5 V to 6 V Full 0 0.4
IOUT = 1 mA Room 1
Dt Vlt
dg
IOUT = 50 mA
Room 45 80
Dropout Voltaged, g
(
V
OUT(nom)
w 2.6 V
)
IOUT = 50 mA Full 50 90
(V
OUT(nom)
w 2
.
6 V)
IOUT = 300 mA
Room 300 350
VIN VOUT
IOUT = 300 mA Full 415 mV
IN OUT
IOUT = 50 mA
Room 65 100
Dropout Voltaged, g
(VOUT( ) t 26 V V
IN w
IOUT = 50 mA Full 120
(VOUT(nom) t 2.6 V, VIN w
2 V)
IOUT = 300 mA
Room 400 520
2 V)
IOUT = 300 mA Full 570
IOUT = 0 mA
Room 100 150
Ground Pin Currente, g
IOUT = 0 mA Full 180
Ground Pin Currente, g
(VOUT(nom) v 3 V)
IOUT = 300 mA
Room 130 200
IGND
IOUT = 300 mA Full 330
mA
IGND
IOUT = 0 mA
Room 110 170 mA
Ground Pin Currente
IOUT = 0 mA Full 200
Ground Pin Currente
(VOUT(nom) u 3 V)
IOUT = 300 mA
Room 150 225
IOUT = 300 mA Full 275
Peak Output current IO(peak) VOUT w 0.95 x VOUT(nom). tPW = 2 ms Full 400 mA
_ VISHAYQ prp‘e R212 SD Pm \npm Cmrem SD
Si91871
Vishay Siliconix
Document Number: 72012
S-51147—Rev. F, 20-Jun-05
www.vishay.com
3
SPECIFICATIONS
Limits
40 to 85_C
Tempa
Test Conditions Unless Specified
TA = 25_C, VIN = VOUT(nom) + 1 V
IOUT = 1 mA, CIN = 2 mF, COUT = 2.0 mF
VSD = 1.5 V
Parameter UnitMaxb
Typc
Minb
Tempa
Test Conditions Unless Specified
TA = 25_C, VIN = VOUT(nom) + 1 V
IOUT = 1 mA, CIN = 2 mF, COUT = 2.0 mF
VSD = 1.5 V
Symbol
Output Noise Voltage eNVNOM = 2.6 V, BW = 10 Hz to 100 kHz,
0 mA t IOUT t 300 mA, CNOISE = 0.01 mFRoom 30 mV(rms)
f = 1 kHz Room 60
Ripple Rejection DVOUT/DVIN IOUT = 300 mA f = 10 kHz Room 40 dB
pp j
OUT IN
OUT
f = 100 kHz Room 30
Dynamic Line Regulation DVO(line) VIN : VOUT(nom) + 1 V to VOUT(nom) + 2 V
tr/tf = 2 ms, IOUT = 300 mA Room 20
mV
Dynamic Load Regulation DVO(load) IOUT : 1 mA to 300 mA, tr/tf = 2 ms Room 20
mV
Thermal Shutdown Junction
Temperature TJ(S/D) Room 150
_C
Thermal Hysteresis THYST Room 20
C
Reverse current IRVIN = 6.0 V Room 1 mA
Short Circuit Current ISC VOUT = 0 V Room 700 mA
Shutdown
Shutdown Supply Current ICC(off) VSD = 0 V Room 0.1 1 mA
SD Pin Input Voltage
VSD
High = Regulator ON (Rising) Full 1.5 VIN
V
SD Pin Input Voltage VSD Low = Regulator OFF (Falling) Full 0.4 V
Auto Discharge Resistance R_DIS Room 100 W
SD Pin Input CurrentfIIN(SD)VSD = 1.5 V, VIN = 6 V Room 0.7 mA
SD Hysteresis VHYST(SD)Full 150 mV
VOUT Turn-On Time tON VSD (See Figure 1), ILOAD = 100 nA 50 ms
Notes
a. Room = 25_C, Full = 40 to 85_C.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Typical values for dropout voltage at VOUT w 2 V are measured at
VOUT = 3.3 V, while typical values for dropout voltage at VOUT < 2 V are measured at VOUT = 1.8 V.
d. Dropout voltage is defined as the input to output differential voltage at which the output voltage drops 2% below the output voltage measured with a 1-V
differential, provided that VIN does not not drop below 2.0 V.
e. Ground current is specified for normal operation as well as “drop-out” operation.
f. The device’s shutdown pin includes a typical 2-MW internal pull-down resistor connected to ground.
g. VOUT(nom) is VOUT when measured with a 1-V differential to VIN.
TIMING WAVEFORMS
FIGURE 1. Timing Diagram for Power-Up
VSD
0.95 VNOM
VOUT
VNOM
tON
0 V
VIN
tr v 1 ms
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Si91871
Vishay Siliconix
www.vishay.com
4
Document Number: 72012
S-51147—Rev. F, 20-Jun-05
PIN CONFIGURATION
MLP33-5 PowerPAK
1
2
1
2
3
4
5
3
4
5
SD
BP
VIN
VOUT
GND
GND
GND
GND
Top View Bottom View
PIN DESCRIPTION
Pin Number Name Function
1 SD By applying less than 0.4 V to this pin, the device will be turned off. Connect this pin to VIN if unused
2 BP Noise bypass pin. For low noise applications, a 0.01 mF ceramic capacitor should be connected from this pin to ground.
3 VIN Input supply pin. Bypass this pin with a 1-mF ceramic or tantalum capacitor to ground
4 VOUT Output voltage. Connect COUT between this pin and ground.
5 GND Ground pin. For better thermal capability, directly connected to large ground plane
ORDERING INFORMATION
Standard
Part Number
Lead (Pb)-Free
Part Number Marking Voltage
Temp.
Range Pkg.
Si91871DMP-12-T1 Si91871DMP-12-E3 7112 1.2
Si91871DMP-18-T1 Si91871DMP-18-E3 7118 1.8
Si91871DMP-25-T1 Si91871DMP-25-E3 7125 2.5
Si91871DMP-26-T1 Si91871DMP-26-E3 7126 2.6
40 to 85
_
C
Si91871DMP-28-T1 Si91871DMP-28-E3 7128 2.8 40 to 85_C MLP33-5
Si91871DMP-30-T1 Si91871DMP-30-E3 7130 3.0
Si91871DMP-33-T1 Si91871DMP-33-E3 7133 3.3
Si91871DMP-50-T1 Si91871DMP-50-E3 7150 5.0
_ VISHAYQ , \
Si91871
Vishay Siliconix
Document Number: 72012
S-51147—Rev. F, 20-Jun-05
www.vishay.com
5
TYPICAL CHARACTERISTICS (INTERNALLY REGULATED, 25_C UNLESS NOTED)
1.0
0.8
0.6
0.4
0.2
0.0
0.2
0.4
40 15 10 35 60 85
Normalized VOUT vs. Temperature
Ambient Temperature (_C)
(%)VOUT
0
50
100
150
200
250
300
234567
No Load GND Pin Current vs. Input Voltage
(I GND mA)
Input Voltage (V)
IOUT = 0 mA
IOUT = 150 mA
IOUT = 75 mA
40_C
85_C
50
75
100
125
150
0 50 100 150 200 250 300
GND Current vs. Load Current
(I GND mA)
Load Current (mA)
600
625
650
675
700
725
750
40 15 10 35 60 85
Output Short Circuit Current vs. Temperature
85_C
(mA)I SC
AmbientTemperature (_C)
25_C
80
60
40
20
0
10 100 1000 10000 100000 1000000
Power Supply Rejection
Frequency (Hz)
Gain (dB)
CIN = 1 mF
COUT = 1 mF
ILOAD = 150 mA
VOUT = 3.0 V
0.75
0.60
0.45
0.30
0.15
0.00
0.15
0.30
0 50 100 150 200 250 300
Normalized Output Voltage vs. Load Current
Output Voltage (%)
Load Current (mA)
VOUT = 2.6 V
VIN = VOUT(nom) + 1 V
VOUT = 3.0 V
VIN = 4.0 V
VIN = VOUT(nom) + 1 V
25_C
40_C
IOUT = 300 mA
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Si91871
Vishay Siliconix
www.vishay.com
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Document Number: 72012
S-51147—Rev. F, 20-Jun-05
TYPICAL CHARACTERISTICS (INTERNALLY REGULATED, 25_C UNLESS NOTED)
0
50
100
150
200
250
300
350
0 60 120 180 240 300
Dropout Voltage vs. Load Current
ILOAD (mA)
(mV)VDROP
0
50
100
150
200
250
300
350
50 25 0 25 50 75 100 125 150
Dropout Voltage vs. Temperature
0.0
0.5
1.0
1.5
2.0
2.5
3.0
0123456
VIN VOUT Transfer Characteristic
VIN (V)
(V)VOUT
Junction Temperature (_C)
0
50
100
150
200
250
300
350
400
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
Dropout Voltage vs. VOUT
Dropout Voltage (mV)
VOUT
(mV)VDROP
IOUT = 0 mA
IOUT = 150 mA
IOUT = 10 mA
IOUT = 75 mA
VOUT = 3.0 V
VOUT = 3.0 V
VOUT = 3.0 V
IOUT = 10 mA
IOUT = 75 mA IOUT = 150 mA
IOUT = 300 mA IOUT = 300 mA
_ VISHAYO
Si91871
Vishay Siliconix
Document Number: 72012
S-51147—Rev. F, 20-Jun-05
www.vishay.com
7
TYPICAL WAVEFORMS
Load Transient Response-1
ILOAD
100 mA/div
VOUT
10 mV/div
VOUT = 3.0 V
COUT = 1 mF
ILOAD = 1 to 150 mA
trise = 2 msec
Load Transient Response-2
VOUT = 3.0 V
COUT = 1 mF
ILOAD = 150 to 1 mA
tfall = 2 msec
20 ms/div
ILOAD
100 mA/div
VOUT
10 mV/div
LineTransient Response-1
VOUT
10 mV/div
VIN
2 V/div
VINSTEP = 4 to 5 V
VOUT = 3 V
COUT = 1 mF
CIN = 1 mF
ILOAD = 150 mA
trise = 5 msec
20 ms/div
LineTransient Respons-2
VINSTEP = 5 to 4 V
VOUT = 3 V
COUT = 1 mF
CIN = 1 mF
ILOAD = 150 mA
tfall = 5 msec
20 ms/div
20 ms/div
VOUT
10 mV/div
VIN
2 V/div
VISHAYQ V | | | J '________ -o————4
Si91871
Vishay Siliconix
www.vishay.com
8
Document Number: 72012
S-51147—Rev. F, 20-Jun-05
TYPICAL WAVEFORMS
Output Noise
VOUT
200 mV/div
Noise Spectrum
4 ms/div 10 Hz
VIN = 4 V
VOUT = 3 V
IOUT = 150 mA
CNOISE = 0.01 mF
BW = 10 Hz to 100 kHz
10
0.01
1 MHz
VIN = 4 V
VOUT = 3 V
ILOAD = 150 mA
CNOISE = 0.01 mF
mVńHz
Ǹ
Output Spectral Noise Density
FUNCTIONAL BLOCK DIAGRAM
Si91871
VIN
Reference
+
Thermal
Sensor
Shutdown
Control
GND
VOUT
Reverse Polarity
Protection
Current
Limit
SD
BP
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Si91871
Vishay Siliconix
Document Number: 72012
S-51147—Rev. F, 20-Jun-05
www.vishay.com
9
DETAILED DESCRIPTION
The Si91871 is a low-noise, low drop-out and low quiescent
current linear voltage regulator, packaged in a small footprint
MLP33-5 package. The Si91871 can supply loads up to
300 mA. As shown in the block diagram, the circuit consists of
a bandgap reference error, amplifier, p-channel pass transistor
and feedback resistor string. An external bypass capacitor
connected to the BP pin reduces noise at the output.
Additional blocks, not shown in the block diagram, include a
precise current limiter, reverse battery and current protection
and thermal sensor.
Thermal Overload Protection
The thermal overload protection limits the total power
dissipation and protects the device from being damaged.
When the junction temperature exceeds 150_C, the device
turns the p-channel pass transistor off.
Reverse Battery Protection
The Si91871 has a battery reverse protection circuitry that
disconnects the internal circuitry when VIN drops below the
GND voltage. There is no current drawn in such an event.
When the SD pin is hardwired to VIN, the user must connect
the SD pin to VIN via a 100-kW resistor if reverse battery
protection is desired. Hardwiring the SD pin directly to the VIN
pin is allowed when reverse battery protection is not desired.
Noise Reduction
An external 10-nF bypass capacitor at BP is used to create a
low pass filter for noise reduction. The start-up time is fast,
since a power-on circuit pre-charges the bypass capacitor.
After the power-up sequence the pre-charge circuit is switched
to standby mode in order to save current. It is therefore not
recommended to use larger bypass capacitor values than
50 nF. When the circuit is used without a capacitor, stable
operation is guaranteed.
Auto-Discharge
The Si91871 VOUT has an internal 100-W (typ.) discharge path
to ground when the SD pin is low.
Stability
The circuit is stable with only a small output capacitor equal to
6 nF/mA (= 2 mF @ 300 mA). Since the bandwidth of the error
amplifier is around 13 MHz and the dominant pole is at the
output node, the capacitor should be capacitive in this range,
i.e., for 150-mA load current, an ESR <0.2 W is necessary.
Parasitic inductance of about 10 nH can be tolerated.
Safe Operating Area
The ability of the Si91871 to supply current is ultimately
dependent on the junction temperature of the pass device.
Junction temperature is in turn dependent on power
dissipation in the pass device, the thermal resistance of the
package and the circuit board, and the ambient temperature.
The power dissipation is defined as
PD = (VIN – VOUT) * IOUT .
Junction temperature is defined as
TJ = TA + ((PD * (RθJC + RθCA)).
To calculate the limits of performance, these equations must
be rewritten.
Allowable power dissipation is calculated using the equation
PD = (TJ TA )/ (RθJC + RθCA)
While allowable output current is calculated using the equation
IOUT = (TJ TA )/ (RθJC + RθCA) * (VIN – VOUT).
Ratings of the Si91871 that must be observed are
TJmax = 125 _C, TAmax = 85 _C, (VIN – VOUT)max = 5.3 V,
RθJC = 8 _C/W.
The value of RθCA is dependent on the PC board used. The
value of RθCA for the board used in device characterization is
approximately 46 _C/W.
Figure 1 shows the performance limits graphically for the
Si91871 mounted on the circuit board used for thermal
characterization.
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0123456
Figure 1. Safe Operating Area
(A)I OUT
VIN VOUT (V)
(VIN VOUT)MAX = 5.3 V
TA = 50_C
TA = 85_C
TA = 70_C
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and
Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see
http://www.vishay.com/ppg?72012.
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Document Number: 91000 www.vishay.com
Revision: 18-Jul-08 1
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All product specifications and data are subject to change without notice.
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